1. Field of the Invention
The present invention relates to a semiconductor memory device.
2. Description of the Related Art
In Japanese Patent Application Laid-Open No. Hei 9-320258 (Patent Document 1), there is disclosed a SDRAM that includes plural data mask signal terminals provided to correspond to data input and output terminals, and input control circuits and output control circuits capable of controlling data input and output from the corresponding data input and output terminals in response to the logic of signals given to individual data mask signal terminals from outside.
In the U.S. Pat. No. 6,466,492 (Japanese Patent Application Laid-Open No. 2002-74952) (Patent Document 2), there is disclosed a semiconductor memory device in which an input buffer is activated/inactivated by a synchronizing mask control signal when it is in an active state.